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Embedded Design Using Programmable Gate Arrays

Embedded Design Using Programmable Gate Arrays

Dennis Silage, PhD
Professor
Electrical and Computer Engineering
Temple University
 





This text is intended as a supplementary text and laboratory manual for undergraduate students in a contemporary course in digital logic and embedded systems. Professionals who have not had an exposure to the fine grained FPGA, the Verilog HDL, an EDA software tool or the new paradigm of the controller and datapath and the FSM will find that this text and the Xilinx Spartan-3E Starter Board provides the necessary experience in this emerging area of electrotechnology.




Embedded Design Using Programmable Gate Arrays describes the analysis and design of modern embedded systems using the field programmable gate array (FPGA).  The FPGA has traditionally provided support for embedded design by implementing customized peripherals and controller and datapath algorithmic state machines.  Although microprocessor-based computer systems have usually been used for the design of larger scale embedded systems, the paradigm of the FPGA now challenges that notion of such a fixed architecture especially with the constraints ofreal-time.
This new paradigm in embedded system design machine describes the Verilog behavioral synthesis of finite state machine as a controller and datapath architecture in digital signal processing (DSP), digital communications, digital control and data communication utilizing the FPGA, the integration of external interface hard peripherals and the implementation of a custom internal soft core peripherals and soft core processors.
The transition to embedded system design now in the massively parallel and fine grained architecture of the modern FPGA is described in-part by the translation of C/C++ program segments for real-time processing to a controller and datapath architecture or an algorithmic state machine.  However, the emergence of the Xilinx 8-bit PicoBlaze and 32-bit MicroBlaze soft core processors now also challenges the conventional microprocessor with its fixed architecture for embedded system design.
Embedded Design Using Programmable Gate Arrays features the Xilinx Spartan-3E™ FPGA and the Digilent Basys Board and the Spartan-3E Starter Board, the Xilinx Integrated Synthesis Environment (ISE) WebPACK design environment in Verilog HDL, the Xilinx CORE Generator for LogiCORE Verilog modules and the Xilinx Embedded Development Kit (EDK) for the Xilinx 8-bit PicoBlaze soft core processor. The complete Xilinx ISE WebPACK Verilog source code modules for the projects delineated in the text and executing on the the Spartan-3E Starter Board are provided for download.  A limited number of Xilinx ISE WebPACK projects can execute on the less expensive Diligent Spartan-3E Basys Board (www.digilentinc.com)
EE3622 Embedded System Design Projects
Here are some Laboratory projects used in the undergraduate ECE course that utilize the Spartan-3E Starter Board and the Xilinx ISE design environment (solutions are not generally available).






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Download  The PowerPoint slides for Chapters 1, 2, 3 and 5 to accompany Embedded Design Using Programmable Gate Arrays here (~2.5 MB, EDPGAslides.zip).  Complete Xilinx ISE WebPACK Projects to accompany Embedded Design Using Programmable Gate Arrays  for the Spartan-3E Starter Board can be downloaded in ZIP archive formathere (~30 MB, s3eEDPGA.zip).  Complete Xilinx ISE WebPACK Projects for the Basys Board (rev E) can be downloaded in ZIP archive format here (~3.5 MB basysEDPGArevE.zip).  The ZIP archive files are password protected as described in Appendix A of the text.







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